Stephen Corbin, Box 567,
Amherst, NH 03031
I am interested in server virtualization and network storage solutions. I have worked in the areas of Computer Architecture, Hardware Design and Software Development. Software experience includes device drivers, operating system internals, Storage Virtualization and user level utilities. My hardware development experience includes CPU design, Multiprocessor System design, embedded microcontrollers and telephone switching. My Architecture experience dealt with Multiprocessor System design and Digital Telephony Switching.
§ Developed a SCSI-2/FCP Target Emulation device driver for the Qlogic QLA2200/QLA2300 Fibre Channel Adapters under Linux.
§ Development of transport independent SCSI-3 Target Emulation device driver under Solaris.
§ Development of Fibre Channel FCP Protocol device driver under Solaris.
§ Development and maintenance of driver code for Logical Storage Manager (Veritas VxVM) product running on Digital Tru64.
§ Developed SCSI device driver for I/O processor based SCSI devices for System V Unix.
Software
– Operating Systems Internals
§ VM Boot time performance enhancements for the Solaris kernel.
§ Implemented NUMA enhancements for the Digital Tru64 VM subsystem.
§ Development and maintenance of kernel Digital Tru64 Unix Virtual Memory subsystem.
§ Ported OSF/AD 14.4 micro-kernel to M88110 Multiprocessor. (C, m88k assembler)
§ Technical leader for System V port to VME/M88000 based multiprocessor. Managed Ethernet and SCSI I/O processor code development.
§ Ported the following subsystems from an ns32532 based System V kernel to the Motorola M88000: multiprocessor cache/TLB coherency, cross-processor synchronization, memory management and MP kernel debugger (C, m88000 Assembler).
§ Ported Encore BSD operating system to ns32532 based multiprocessor. Re-wrote trap and interrupt code, memory management and cache handling, system boot and initialization, and multiprocessor debug monitor (C, ns32000 Assembler).
§ Ported Encore System V operating system to ns32532 based multiprocessor
§ Added BSD system call, process management, resource usage/statistics, and job control semantics to System V based kernel. This allowed the System V kernel to have complete binary compatibility with BSD applications, libraries and utilities.
§ Designed new pipe subsystem for BSD based kernel using circular buffers. Realized a 4x performance increase over socket-based code.
§ Modified BSD based kernel to support runtime statistics gathering and performance monitoring.
Software
– Real Time and Embedded
§ Designed/Implemented kernel preemption to improve process scheduling and real-time response times for Mach 3.0 (OSF1/MK) Micro-kernel.
§ Ported Real-Time Mach/OSF micro-kernel to i486 Multiprocessor. (C, x86 assembler)
§
Development and maintenance of Software Partitioning
functionality that allowed a real-time kernel to run co-resident with Encore’s
BSD and System V unix kernels. (C, m88k assembler)
§ Hardware and Firmware design for 68HC11 based product. LCD, EEPROM, Serial interface, keypad, A/D and analog, 68HC11 assembler.
§ Developed 2D graphics library for ATI chipset that ran under DOS/Win3.1. (x86 assembler)
§ Wrote portions of BIOS for CPM/Z80 system: floppy disk control and formatting, interrupt driven serial interface. (Z80 assembler)
§ Developed serial communications driver and data transfer utility under RT-11. (PDP-11 assembler)
Software – Applications and Tools
§ Developed data encapsulation and migration functionality into Digital’s Logical Storage Manager product.
§
Created software development environment for managing
large-scale kernel development for multiple target platforms. Created automatic makefille generation
utility. (C, LEX, YACC, SH, CSH, RCS, SCCS)
§
Developed kernel profiling and performance analysis
utilities for BSD based kernel.
§
Maintenance of BSD and System V libraries and
utilities.
§
Developed inventory control system for tracking lab
supplies. (Reality DataBasic/Pick)
§
Developed user interface for PCB thermal analysis
library. (DataBasic/Fortran)
§ Designed a dual processor card using the ns32332 microprocessor. Design consisted of 400+ IC’s: ns32332 CPU, TTL, FGPA, PAL, RAM/Cache Memory.
§ Managed CPU development group.
§ Designed the System Control Card for the Encore Multimax - Embedded system diagnostic processor, front panel and console, Nanobus bus timing and arbitration module, and environmental sensors. Design consisted of 400+ IC’s: ns32016 CPU, TTL, CMOS, FGPA, PAL, RAM/EPROM, A/D conversion, analog.
§ Architecture and hardware design of Central Switch and TDMA bus for Non-Blocking Fourth Generation Voice/Data PBX. Designed 2 Versabus based boards: 375 IC’s: TTL, ECL, CMOS, i8051, FPGA, PAL, RAM, i8051 Firmware.
§ Member of 6-person CPU design team designing new 10-stage pipelined 32-bit ECL super-minicomputer at Prime Computer. Designed one of 5 subsystems: 300 ECL IC’s, 40 TTL IC’s, Embedded i8031.
§ Microcode/firmware development for diagnostic testing of Prime Super Minicomputer CPU.
§ PCB layout and routing.
Computer
Architecture
§ Co-Architect and designer of the Encore Multimax shared memory multiprocessor.
§
Researched cache protocols and memory structures for
multi-level SMP/NUMA architectures.
§ Developed behavioral models for various designs using Verilog.
§
Designed ownership based write-back cache protocol for
a pipelined, pended, hierarchical shared memory bus. (Nanobus).
§
Designed the arbitration, bus protocol and bus timing
for the Nanobus.
WORK HISTORY
Laurel Computer Corporation
Consultant, 1993 - Present
Contracting work for the following clients:
Egenera, Inc., Linux Device Driver Development:
SUN Microsystems, Inc., Network Storage Product Development and Solaris Device Drivers.
Digital Equipment Corporation, Digital Unix/Tru-64 Unix internals.
Center for High Performance Computing, Mach/OSF Kernel Internals.
Various Small Businesses, MS Windows Network Installation and Support.
Encore Computer Corporation
Senior Technical
Consultant – Operatings Systems Group, 1989 - 1993
Encore Computer Corporation
System Architect,
1987 - 1989
Encore Computer Corporation
Manager of CPU
Development, 1986 - 1987
Hydra Computer Systems, Inc.
Senior Technical Consultant – Hardware Design and Architecture, 1984 – 1986
Project Leader – Telephone Switching Group, 1983 -
1984
Principal
Engineer - CPU Design, 1980
-1983
Modicon
Internship, 1979 – 1980
§ S. Corbin, et al, "Memory Alignment System and Method". Prime Computer Inc. Patent #4,750,154, June 7, 1988.
§ S. Corbin, et al, “Multiprocessor Computer System Employing a Plurality of Tightly Coupled Processors with Interrupt Vector Bus”. Encore Computer. Patent #5,067,071, November 19, 1991.
§ R. Billig, S. Corbin, R. Moore, "A Fast Backplane Cluster Heralds a 1000-MIPS Computer." Electronic Design, July 9, 1987.
B.S. EE/CS, University of Massachusetts, Amherst, Massachusetts, 1980.