Attention: Human resources manager / Engineering manager,

I am applying for the Hardware Engineer position in the field of Digital 
ASIC/FPGA design Engineering or Applications Engineering. I am 
considering both permanent and contract positions.

I have a Master's degree (MSEE) in Electrical Engineering and my industry 
experience includes four years of Digital ASIC Design Engineering and one 
year of Applications Engineering.

My engineering experience, in DSP and Video products, includes working on 
various stages of the design flow and performing functions such as RTL 
logic design using Verilog; design verification; FPGA design; Dynamic 
timing analysis using TimeMill; Test pattern generation using Tetramax; 
PCB design. As an FAE, I managed customers in the Asia pacific region and 
managed and resolved customer issues using video encoding ASIC. 

I am a Canadian resident and my Canadian Citizenship application has been filed. 
I am  willing to relocate and I can be reached at (416) 716-5634 (Cell) or 
(416) 291-1078 or salah.kazi@gmail.com.  

Sincerely,


Salahuddin (Salah) Kazi
100 Gristone Crescent, Toronto, Ontario, Canada, M1X 1T6 
(416) 716-5634 (Cell), (416) 291-1078, salah.kazi@gmail.com 
http://salahkazi.tripod.com/resume.htm


OBJECTIVE

To work as a Digital ASIC/FPGA Design Engineer or Applications Engineer 

SUMMARY OF QUALIFICATIONS

* Master of Science in Electrical Engineering and Bachelor of Science in Computer Science
* Four years of experience in ASIC Design and one year in Applications Engineering 
* Worked on ASIC, FPGA and RISC based design using Verilog and VHDL
* Expertise in Cadence and Synopsys tools like Verilog, TimeMill and Tetramax
* Experience with Video and DSP products 
* Knowledge of programming in C language and using PERL scripts 
* Debugged design for timing failures and test vector failures
* Used test and measurement equipment like ATE, Logic analyzer and Oscilloscope
* Managed customers and resolved technical issues


TECHNICAL SKILLS

Application Software  (UNIX Environment)
Verilog HDL, Viewlogic VHDL, Verilog-XL, TimeMill, PathMill, Tetramax, 
ALTERA MAX+II, OrCAD, HSPICE

Programming Languages
C, Perl

Test Equipment
Logic analyzer, Oscilloscope, Agilent SC93000 ATE, Teradyne Tiger ATE


EMPLOYMENT HISTORY

ViXS Systems, Toronto,  2006 to 2007
Applications Engineer -- ASIC

ATI Technologies, Toronto,  2005 to 2006
ATE Test Technologist (Contract)

Software Associates, Atlanta,  2003 to 2004
Contract Consultant

Agere Systems, Atlanta,  2000 to 2002
Digital Design Engineer

Fairchild Semiconductor, San Diego,  1998 to 2000
ASIC Design Engineer


WORK EXPERIENCE

Design – Digital ASIC
* Debugged timing issues after configuring TimeMill and performing dynamic 
timing analysis on top gate level netlist of DSP processor
* Generated ATPG vectors in Tetramax and debugged functional test failures
* Verified Verilog cell library against SPICE library and reported discrepancies 
* Analyzed and reported power consumption of the chip using PowerMill
* Designed and coded RTL logic of Remote 8-bit I/O expander for I2C bus 
using Verilog HDL and developed testbench for verification using Verilog-XL 
* Synthesized Verilog design using Make files and Synopsys tools 
* Verified the isophase mode of Video decoder and determined the offset limits

Design – FPGA
* Designed FPGA error counter and entered schematic using ALTERA MAX+II tools
* Verified design using built-in MAX+II tools

Applications Engineering 
* Managed ViXS customers in Asia, provided technical support and assisted them 
in integrating Video Processor ASIC in their PCI/PCIe systems
* Assisted customers in the development and debugging of boards designed for 
video compression by encoding and transcoding
* Debugged issues with customer PCB boards
* Developed Application notes and test procedures
* Educated customers using ViXS products for MPEG2, MPEG4 and AVC processing
* Coordinated with the firmware and driver development teams to implement feature requests and updates
* Reviewed schematics and provided feedback to customers 

ATE Testing
* Configured Agilent SC93000 and Teradyne Tiger ATE and Epson handler
* Executed test vectors, form Test Engineer, on post silicon ASIC for functional validation

Contract Consulting 
* Provided support to customer in performing timing requirement analysis
* Provided lab support customer maintaining computer systems


EDUCATION

Master of Science, Oklahoma State University, Stillwater, OK, USA, 1997
Electrical and Computer Engineering (MSEE)

Bachelor of Engineering, Osmania University, Hyderabad, India, 1995
Computer Science and Engineering


Salahuddin (Salah) Kazi
100 Gristone Crescent, Toronto, Ontario, Canada, M1X 1T6 
(416) 716-5634 (Cell), (416) 291-1078
salah.kazi@gmail.com 
http://salahkazi.tripod.com/resume.htm